首页> 外文会议>IEEE CPMT Symposium Japan >Co-design importance for over 20Gbps I/O interface
【24h】

Co-design importance for over 20Gbps I/O interface

机译:协同设计对于20Gbps以上I / O接口的重要性

获取原文

摘要

To achieve high performance communication it is necessary to consider all the design parameters for the switching circuit, interconnection and power supply. As these parameters definitely affect each other for over 20Gbps. These must be included for their optimization. These parameters are driver on-resistance (drivability), characteristic impedance of all connection routs, dependent frequency load with termination condition, receiver sensitivity and input impedance of power source within 1/4 wave length. Synopsys HSPICE is used for the simulation of the I/O interfaces with actual measurement S-parameter and 65nm process node in the TSMC IP's. In our study, we concluded that the power source line should be low impedance transmission line even 1mm length as similar as 1/4 wavelengths.
机译:为了实现高性能通信,必须考虑开关电路,互连和电源的所有设计参数。因为这些参数在超过20Gbps时肯定会相互影响。必须包含这些内容以进行优化。这些参数是驱动器导通电阻(可驱动性),所有连接路径的特性阻抗,具有终止条件的相关频率负载,接收器灵敏度以及1/4波长以内的电源输入阻抗。 Synopsys HSPICE用于仿真具有TSMC IP中实际测量S参数和65nm工艺节点的I / O接口。在我们的研究中,我们得出的结论是,电源线应该是低阻抗传输线,即使长度为1mm,也类似于1/4波长。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号