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VLSI design methods for low power embedded encryption

机译:低功耗嵌入式加密的VLSI设计方法

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Intelligent things, medical devices, vehicles and factories, all part of cyberphysical systems, will only be secure if we can build devices that can perform the mathematically demanding cryptographic operations in an efficient way. Unfortunately, many of devices operate under extremely limited power, energy and area constraints. Yet we expect that they can execute, often in real-time, the symmetric key, public key and/or hash functions needed for the application. At the same time, we request that the implementations are also secure against a wide range of physical attacks. This presentation will focus on the design methods to realize cryptographic operations on resource constrained devices. To reach the extremely low power, low energy and area budgets, we need to consider in an integrated way the protocols, the algorithms, the architectures and the circuit aspects of the application. These concepts will be illustrated with the design of several cryptographic co-processors suitable for implementation in embedded context.
机译:智能物,医疗设备,车辆和工厂,是网络物理系统的所有组成部分,只有在我们能够构建能够以高效方式执行数学上要求严格的密码运算的设备的情况下,才会安全。不幸的是,许多设备在极其有限的功率,能量和面积限制下运行。但是我们希望它们可以经常实时地执行应用程序所需的对称密钥,公钥和/或哈希函数。同时,我们要求这些实施方案也应能够抵御各种物理攻击。本演讲将重点介绍在资源受限的设备上实现加密操作的设计方法。为了达到极低的功耗,低能耗和面积预算,我们需要以综合的方式考虑应用程序的协议,算法,体系结构和电路方面。这些概念将通过适用于嵌入式环境的几种密码协处理器的设计进行说明。

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