A new level sensitive D Latch using Ballistic nanodevices

摘要

In this paper, a D-Latch design using Ballistic Deflection Transistors (BDT) is presented. BDT technology was developed and experimentally proven to operate at THz frequencies. A simple, compact fit based analytical BDT model, developed previously to aid circuit design was utilized in this paper. The empirical device model is integrated into a behavioral Verilog A module to facilitate the investigation of the D-latch design. The D-latch design is based on the concept of BDT multiplexer structure and has been built using two instances of a single BDT modeled in Cadence AMS simulator. The simulation results confirm the correct operation of the D-latch.