首页> 外文会议>ASME international technical conference and exhibition on packaging and integration of electronic and photonic microsystems >THE IMPACT OF INTERFACIAL LAYERS ON THE THERMAL BOUNDARY RESISTANCE AND RESIDUAL STRESS IN GAN ON SI EPITAXIAL LAYERS
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THE IMPACT OF INTERFACIAL LAYERS ON THE THERMAL BOUNDARY RESISTANCE AND RESIDUAL STRESS IN GAN ON SI EPITAXIAL LAYERS

机译:界面层对SI外延层上GAN的热边界电阻和残余应力的影响

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The development of gallium nitride (GaN) on silicon (Si) substrates is a critical technology for potential low cost power electronics. These devices can accommodate faster switching speeds, hotter temperatures, and high voltages needed for power electronics applications. However, the lattice mismatch and difference in crystal structure between 111 Si and c-axis hexagonal GaN requires the use of buffer layers in order to grow device quality epitaxial layers. For lateral high electron mobility transistors, these interfacial layers act as a potential source of increased thermal boundary resistance (TBR) which impedes heat flow out of the GaN on Si devices. In addition, these interfacial layers impact the growth and residual stress in the GaN epitaxial layer which can play a role in device reliability. In this work we use optical methods to experimentally measure a relatively low TBR for GaN on Si with an intermediate buffer layer to be 3.8 ± 0.4 m~2K/GW. The effective TBR of a material stack that encompasses GaN on Si with a superlattice (SL) buffer is also measured, and is found to be 107 ± 1 m~2K/GW. In addition the residual state of strain in the GaN layer is measured for both samples, and is found to vary significantly between them. Thermal conductivity of a 0.8um GaN layer on A1N buffer is determined to be 126 ± 25 W/m-K, while a 0.84 urn GaN layer with C-doping on a SL structure is determined to be 112 ± 29 W/m-K.
机译:硅(Si)衬底上氮化镓(GaN)的开发是潜在的低成本功率电子产品的一项关键技术。这些设备可以适应更快的开关速度,更高的温度以及电力电子应用所需的高电压。然而,晶格失配和111 Si与c轴六角形GaN之间的晶体结构差异要求使用缓冲层,以生长器件质量的外延层。对于横向高电子迁移率晶体管,这些界面层充当增加的热边界电阻(TBR)的潜在来源,这会阻止热量从Si器件上的GaN流出。另外,这些界面层影响GaN外延层中的生长和残余应力,这可以在器件可靠性中起作用。在这项工作中,我们使用光学方法实验性地测量了具有较低缓冲层的Si上GaN的TBR较低,为3.8±0.4 m〜2K / GW。还测量了具有超晶格(SL)缓冲层的包含Si上GaN的材料堆叠的有效TBR,发现其为107±1 m〜2K / GW。此外,对两个样品都测量了GaN层中应变的残余状态,发现它们之间存在显着变化。确定在AlN缓冲层上的0.8um GaN层的热导率为126±25 W / m-K,而在SL结构上进行C掺杂的0.84 um GaN层的热导率被确定为112±29 W / m-K。

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