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ASSEMBLY PROCESS DEVELOPMENT FOR A 14MMX14MM BOND VIA ARRAY (BVA) PACKAGE-ON-PACKAGE (POP)

机译:通过阵列(BVA)封装在包装(POP)的14MMX14MM粘结的组装工艺开发

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Package on Package (PoP) components offer a low cost, high performance solution for stacking of a logic device with memory. There are a number of challenges in the final assembly at the Electronic Manufacturing Services (EMS) facility. An assembly process has been developed for a Bond Via Array (BVA) PoP package having 14mm x 14mm body size with a topside memory module and a bottom logic module. In this PoP design, the solder ball interconnects between the top memory module and bottom logic module has 5 outer rows having 1020 I/O with a 0.24 mm pitch. The solder ball interconnects between the bottom logic module and the PCB is a patterned array having 916 I/O with a 0.4mm pitch. A special focus on this work was the optimization of the stacking process of the memory solder balls to make good interconnections to the BVA wires protruding from the bottom logic package. Topics covered for process evaluation will be vision systems, yield, package alignment and placement, voiding and major-defect identification such as bridging, opens-insufficient solder. Process issues related to solder volume, substrate coplanarity and x-ray inspection techniques will be presented. Finally design recommendations, reliability data and rework techniques will be reviewed.
机译:堆叠式封装(PoP)组件提供了一种低成本,高性能的解决方案,用于将逻辑设备与内存进行堆叠。在电子制造服务(EMS)设施的最终组装中存在许多挑战。已经开发出用于具有14mm x 14mm主体尺寸的键合通过阵列(BVA)的PoP封装的组装工艺,并带有顶部存储模块和底部逻辑模块。在此PoP设计中,顶部存储器模块和底部逻辑模块之间的焊球互连具有5个外部行,这些行具有0.24毫米间距的1020 I / O。底部逻辑模块和PCB之间的焊球互连是一个带图案的阵列,该阵列具有916个I / O,间距为0.4mm。这项工作的重点是优化存储器焊球的堆叠工艺,以便与从底部逻辑封装伸出的BVA导线实现良好的互连。用于过程评估的主题包括视觉系统,良率,封装对准和放置,空洞和主要缺陷识别(例如桥接,焊锡不足)。将介绍与焊料量,基板共面性和X射线检查技术有关的工艺问题。最后将审查设计建议,可靠性数据和返工技术。

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