CMOS analogue integrated circuits; LC circuits; field effect MIMIC; low noise amplifiers; ultra wideband technology; CMOS; bandwidth 40 GHz to 67 GHz; bandwidth maximization; current-sharing configuration; gain 23 dB; gain flatness; mm-wave LNA; noise figure 5.8 dB; power 25.3 mW; size 28 nm; stagger-tuned stages; third-order L-C band-pass networks; ultrawideband LNA; wideband receivers; Bandwidth; CMOS integrated circuits; Frequency response; Gain; Inductors; Noise measurement; Transistors; CMOS integrated circuits; Low-noise amplifiers; Low-power electronics; Millimeter wave integrated circuits; Wideband;
机译:利用增益带宽乘积优化技术的双宽带CMOS LNA
机译:利用双负反馈同时实现噪声,增益和带宽优化的宽带共栅CMOS LNA
机译:具有65nm CMOS的55–64GHz低功耗小面积LNA,具有3.8dB的平均NF和〜12.8dB的功率增益
机译:40GHz至67GHz带宽23dB增益5.8dB在28nm CMOS中的最大NF mm-Wave LNA
机译:采用65nm CMOS技术的宽带毫米波LNA,具有最小的增益和噪声变化
机译:高达36Gbps的模拟基带均衡器和解调器,用于28nm CmOs的毫米波无线通信