Kaolin: A system-level AADL tool for FPGA design reuse, upgrade and migration

摘要

Nowadays, the development, maintenance and evolution of products based on FPGAs remains a difficult and time consuming task, especially in today's stringent and fast-paced markets. Designers need to master technology-specific implementation details, which often vary across FPGA models, tool versions and vendors, thus making it difficult to port code from one target device to another. To address these problems, we present the Kaolin model-based development process and tool. Kaolin users design their systems at the functional level, whilst the execution platform-specific details are automatically generated according to the selected FPGA platform model. Additionally, legacy HDL code can be imported thanks to state-of-the-art bi-directional model transformations, so that existing systems can be retargeted to other FPGA platforms. The advantages of Kaolin are demonstrated via an industrial acoustic recorder case study, which has been automatically imported into Kaolin and retargeted to a different FPGA platform with improved performances.