Thermal experimental and modeling analysis of high power 3D packages

摘要

In this paper, we present the experimental and modeling characterization of 3D packages for high power applications using a dedicated stackable test chip. An advanced CMOS test chip with programmable power distribution and a 32×32 array of temperature sensors has been designed, fabricated, stacked and packaged in bare die 3D packages. The package thermal measurements have been used to characterize the thermal behavior and to successfully validate the thermal finite element modeling results.