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Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs

机译:低待机功率电容耦合读出放大器,可在双轨SRAM的宽电压范围内工作

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Dual Rail SRAMs are widely used to enable Dynamic Voltage and Frequency Scaling (DVFS) in SRAMs where array voltage cannot be scaled down. DVFS operating points are limited by maximum differential supported between two supplies of the SRAM. To extend gains of DVFS, we propose a Low Standby Power - Capacitively Coupled Sense Amplifier (LSTP-C2SA) that enables further lowering of periphery supply in Dual Rail SRAMs without leading to SRAM cell instability. We present a design method to optimally size the coupling capacitance in LSTP-C2SAs. Designs with LSTP-C2SA are shown to consume 43% lesser read power in DVFS operation at 0.4V in 28nm UTBB FD-SOI when compared to an implementation with standard latch sense amplifier. Silicon measurements confirm LSTP-C2SA functionality at 0.35V.
机译:双轨SRAM被广泛用于在阵列电压无法按比例缩小的SRAM中实现动态电压和频率缩放(DVFS)。 DVFS工作点受两个SRAM电源之间支持的最大差分限制。为了扩展DVFS的增益,我们提出了一种低待机功率-电容耦合读出放大器(LSTP-C2SA),该放大器能够进一步降低双轨SRAM中的外围电源,而不会导致SRAM单元不稳定。我们提出一种设计方法,以最佳地确定LSTP-C2SAs中的耦合电容。与采用标准锁存读出放大器的实现方案相比,采用LSTP-C2SA的设计在28nm UTBB FD-SOI上以0.4V进行DVFS操作时,消耗的读取功率降低了43%。芯片测量结果证实了LSTP-C2SA在0.35V电压下的功能。

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