Teaching low-power design with an FPGA-based hands-on and remote lab

摘要

This paper describes a project carried out at the Bonn-Rhein-Sieg University to teach low-power digital design structures in a laboratory. Low-power design has become one of the most essential constraints in digital systems, especially in portable devices. For this purpose, low-power design is a topic addressed in electrical and computer curricula, but it also requires applications in a laboratory. Therefore, this project focuses on preparing students for current trends in low-power design by examining realistic applications of its basic theories and principles, either hands-on or remotely. The laboratory's experiments use a field programmable gate array (FPGA) as a design platform for implementing the students' digital designs. This contribution reports on our first experiences in teaching low-power design in the lab. This paper focuses on the educational impact on students regarding the following: (1) overall objectives in the laboratory, (2) experimental exercises with low-power techniques, and (3) using educational FPGA boards and the EduPow board. The EduPow board is a developed hands-on board at the Bonn-Rhein-Sieg University that is relatively specific on using various signal image-processing applications to directly observe the power dissipation of a student's digital algorithm. Our assessment of the low-power design lab shows that the requirements and objectives of this project are fairly well satisfied. In addition, students' feedback indicates that using the EduPow board is more attractive and motivational in their work.