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A 0.9V 10GHz 71μW Static D Flip-flop by using FinFET Devices

机译:使用FinFET器件,0.9V 10GHz71μW静态D触发器

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As the feature size of the CMOS technology continues to scale down, new technology such as FinFET has been experimented and proposed as a promising alternative technology because of its better scaling capacity. In this paper, by using 32 nm FinFET devices, we propose new a static D flip-flop whose clock frequency can be as high as 10 GHz, while the power consumption is only 71 μW. Further experimental results show that the new D flip-flop can work even when the clock frequency is as high as 15 GHz.
机译:由于CMOS技术的特征规模继续缩减,因此,FinFET等新技术已经尝试,并提出了由于其更好的缩放能力而成为一个有前途的替代技术。在本文中,通过使用32个NM FinFET器件,我们提出了新的静态D触发器,其时钟频率可以高达10 GHz,而功耗仅为71μW。进一步的实验结果表明,即使时钟频率高达15GHz,新的D触发器也可以工作。

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