An Image Processing Platform: RASH-IP

摘要

We developed an image processing platform RASH-IP on the basis of development know-how of FPGA-based parallel machine RASH. RASH-IP contains six ALTERA Stratix (EP1S25) FPGAs on the VME board. RASH-IP boards have 10 buses in order to transfer HDTV video image data with several FPGAs. Each FPGA is directly connected to an 8M-byte synchronous SRAM so that it can hold the large amount of data. Moreover, RASH-IP boards have parallel 10 ports and serial 10 ports for image data transmission between boards. We examined an application of affine-transfer processing of video image data on RASH-IP.