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Low-cost and accurate DAC linearity test with ultrafast Segmented Model Identification of Linearity Errors and Removal Of Measurement Errors (uSMILE-ROME)

机译:用超快分段模型识别线性误差和测量误差的耗材低成本和精确的DAC线性测试(USMILE-ROME)

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The Digital-to-Analog-Converter (DAC) is one of the fundamental components of Analog and Mixed-signal circuits. Static linearity testing of high resolution high performance DACs traditionally requires a long time and is very expensive. In this paper, a low-cost ultrafast method of testing DACs is presented. The method utilizes a low cost on-board measurement device for capturing the output of the DAC, instead of a precise digital voltmeter. By using a segmented non-parametric model for the DAC's INL curve and thus reducing the number of unknowns, the test time is drastically reduced. Additionally, the linearity requirement on the measurement device is significantly relaxed by removing its non-linearity. The combination of these two methods results in drastic reduction in linearity test cost for DACs.
机译:数模转换器(DAC)是模拟和混合信号电路的基本组件之一。高分辨率高性能DAC的静态线性测试传统上需要很长时间并且非常昂贵。本文提出了一种低成本的超快测试DACS方法。该方法利用低成本的板载测量装置来捕获DAC的输出,而不是精确的数字电压表。通过使用DAC的INL曲线的分段非参数模型,从而减少未知数的数量,测试时间大大降低。另外,通过去除其非线性度来显着放松对测量装置的线性度要求。这两种方法的组合导致DAC的线性测试成本的急剧降低。

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