A 12Gb/s 0.92mW/Gb/s forwarded clock receiver based on ILO with 60MHz jitter tracking bandwidth variation using duty cycle adjuster in 65nm CMOS

摘要

This paper presents a quarter-rate forwarded clock (FC) receiver based on an injection-locked oscillator (ILO) which exploits a phenomenon that phases of the output clock are shifted by the duty cycle of an injection clock. To utilize this phase shifting phenomenon, a simple duty cycle adjuster (DCA) is proposed. By using the DCA, the proposed FC receiver achieves 760MHz of wide jitter tracking bandwidth (JTB) while consuming 11mW. Furthermore, it has only 60MHz JTB variation which is reduced by 74% compared to the conventional ILO in spite of clock deskew. The test chip achieves 12Gb/s data rate with 0.92mW/Gb/s in a 1V 65nm CMOS process.