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The defect reduction of via opens by the integration of inter-metal-dielectric film, metal hard mask, and all-in-one etch processes

机译:通过金属间介电膜,金属硬掩模和一体化蚀刻工艺的整合,通过缺陷通过通孔的缺陷。

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摘要

This research aims at the pattern failure defects by the backend all-in-one (AIO) etching process during a recent technology development in a 12-inch FAB. The AIO etch directly defines the shape of both trench and via, however, those previous process steps involving the deposition of inter-layer-dielectric film, metal hard mask and the wet clean would contribute to the AIO etch performance and even cause pattern defects. The investigation elucidates the count of pattern failure defects strong correlates with the life time of ST250 which was used to remove polymer post metal hard etch process. The experiments shows that to extend ST250 rise time and add a scrubber process step can achieve a comparable defect performance with the old acid which run time > 50hrs. Eventually, the additional scrubber process was added to reduce defect counts and gained end-of-the-line 4% yield.
机译:该研究旨在在12英寸Fab中最近的技术开发期间由后端一体化(AIO)蚀刻过程的图案失效缺陷。 AiO蚀刻直接限定了沟槽和透支的形状,然而,涉及层间介电膜的沉积,金属硬掩模和湿式清洁的先前处理步骤将有助于AiO蚀刻性能,甚至导致图案缺陷。该研究阐明了图案失效的计数缺陷与ST250的寿命相关的缺陷与用于除去聚合物金属后硬质蚀刻工艺的ST250的寿命。实验表明,为了延伸ST250上升时间并加入洗涤器工艺步骤可以通过运行时间> 50Hrs的旧酸来实现相当的缺陷性能。最终,加入额外的洗涤器方法以减少缺陷计数并获得终端的4%产量。

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