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A 550???2260MHz self-adjustable clock generator in 28nm FDSOI

机译:2260MHz 2260MHz自调节时钟发生器在28nm FDSOI中

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A self-adjustable clock generator that closely tracks the voltage dependence of the critical path delay in a microprocessor is presented. Real-time frequency modulation performed by a tunable replica circuit (TRC) reduces the response time to a single cycle, by picking the appropriate phases of the delay-locked loop (DLL). The generator has wide tuning range of 550-2260 MHz at 1V supply voltage, works down to 35 MHz at 0.4V supply, and can continuously synthesize the clock signal for arbitrary voltage waveforms between 0.4V and 1V. The proposed design was implemented in a 28nm FDSOI, and occupies an area of 1120μm2 with 2.7mW of power consumption.
机译:提供了一种紧密跟踪微处理器中临界路径延迟的电压依赖性的自调节时钟发生器。通过可调谐副本电路(TRC)执行的实时频率调制通过挑选延迟锁定环(DLL)的相应相位来将响应时间降低到单个周期。发电机在1V电源电压下具有550-22260 MHz的宽调谐范围,可在0.4V电源下工作至35 MHz,并且可以连续地合成时钟信号,在0.4V和1V之间进行任意电压波形。所提出的设计在28nm FDSOI中实施,占据1120μm2的面积,功耗为2.7mW。

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