Full-chip correction of implant layer accounting for underlying topography

摘要

Photolithography for the formerly "non-critical" implant blocking layers is becoming more challenging as edgeplacement control budgets for junction definition shrink with each node. In addition to the traditional proximityeffects associated with the implant layer mask, the underlying active and gate layers can interact through a variety ofmechanisms to influence the edge placement of the developed implant layer. These mechanisms include bulkreflectivity differences, resist thickness thin film interference effects, reflective notching from pattern sidewalls,reflections from curved surfaces, focus differences, and more. While the use of organic developable bottomantireflection coating (dBARC) can be effective in minimizing these influences, it does represent an addedcomplexity and cost, and processes are still relatively immature. Without such a dBARC, the CD variation due tounderlying layers can easily exceed 50 nm, or more than 25% of the target dimension. We propose here aframework for modeling and correcting for these underlayer effects. The approach is based upon calibration of anoptical model representing only implant mask proximity effects and two additional optical models which representthe effects of the underlayer topography. Such an approach can be effective in delivering much improved CDcontrol for complex layouts, and represents only a small impact to full-chip correction runtime.© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.