An industrial case study of analog fault modeling

摘要

Analog fault modeling (AFM) provides a quantitative measure of quality and insight into defective device behavior. However, the high computational burden typically associated with fault simulation makes it unappealing for industrial applications. We propose an efficient methodology to reduce computational burden of the AFM method by exploiting the hierarchical nature of process variation. We apply the proposed methodology on an industrial SerDes TX Driver circuit and achieve 98% simulation time reduction. We quantify defect impact with a defect severity measure.