首页> 外文会议>2011 International Symposium on VLSI Technology, Systems and Applications >UTBOX and ground plane combined with Al2O3 inserted in TiN gate for VT modulation in fully-depleted SOI CMOS transistors
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UTBOX and ground plane combined with Al2O3 inserted in TiN gate for VT modulation in fully-depleted SOI CMOS transistors

机译:UTBOX和接地层与在TiN栅极中插入的Al 2 O 3 结合,用于全耗尽SOI CMOS晶体管中的V T 调制

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Thin film devices (FDSOI) are among the most promising candidates for next device generations due to their better immunity to short channel effects (SCE). In addition, the introduction of high-k and metal gate has greatly improved the MOSFETs performance by reducing the electrical oxide thickness (CET) and gate leakage current. However, if midgap metal gate is sufficient to provide a high symmetrical threshold voltage (VT∼0.45V) for both NMOS and PMOS devices [1], still one major challenge is to provide VT modulation with an undoped channel in order to satisfy the low power (LP) circuit design requirements [2–5]. To overcome this issue, combining UTBOX substrate with ground plane (GP) has been proposed [2,5]. However this technique with midgap metal gate requires a FBB biasing in order to realize low VT that''s implies a disruptive circuits design to avoid forward diode biasing in the substrate between the two opposite GP type beneath the BOX [6]. In order to introduce more VT modulation flexibilities and especially for LVT PMOS and HVT NMOS, aluminum Oxide (Al2O3) inserted in TiN gate stack has been proposed for bulk devices [7–8] in a gate first process. The viability of this option is studied in this paper for FDSOI, for HfO2 and HfSiON gate oxide, through transistors performance, reliability and variability analysis.
机译:由于薄膜器件(FDSOI)对短沟道效应(SCE)具有更好的免疫力,因此它们是下一代器件最有希望的候选者。此外,高k和金属栅极的引入通过减小电氧化物厚度(CET)和栅极泄漏电流大大提高了MOSFET的性能。但是,如果中间能隙金属栅极足以为NMOS和PMOS器件提供高对称阈值电压(V T 〜0.45V)[1],那么仍然面临的主要挑战是提供V T 调制采用无掺杂通道,以满足低功耗(LP)电路设计要求[2-5]。为了克服这个问题,已经提出将UTBOX基板与接地平面(GP)结合在一起[2,5]。然而,具有中间能隙金属栅极的这项技术需要FBB偏置才能实现低V T ,这意味着采用破坏性的电路设计,可以避免在衬底下方两个相对的GP型之间的衬底中出现正向二极管偏置。专栏[6]。为了引入更多的V T 调制灵活性,尤其是对于LVT PMOS和HVT NMOS,在TiN中插入氧化铝(Al 2 O 3 )有人建议先在大批量设备中使用栅极堆叠[7-8]。通过晶体管性能,可靠性和可变性分析,本文针对FDSOI,HfO 2 和HfSiON栅氧化物研究了该选项的可行性。

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