A low power 14-bit 1 MS/s differential SAR ADC with on chip multi-segment bandgap reference

摘要

As a key element in mixed-signal ICs, the SAR architecture has advantages of low power consumption, medium speed and high resolution. However, for the common architecture, there are still some limitation such as low time efficiency, sensitive to the noise of digital part and need high precision outside reference voltage to ensure performance [1]. In this paper, a 14-bit low power self-timed differential SAR ADC with a new structure high precision multi-segment bandgap reference (BGR) is presented. In this design, Self-timed bit-cycling is adopted to enhance the time efficiency. Gray coding form mode control words are utilized instead of binary for mode control to reduce substrate noise and enhance the linearity of the whole system.