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Low power, high precision and reduced size CMOS Comparator for high speed ADC design

机译:低功耗,高精度和小尺寸CMOS比较器,用于高速ADC设计

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In this paper a low power CMOS Comparator is proposed which is very well capable of distinguishing DC voltage difference of around even 0.2 mV. By providing excitory feedback, the proposed compact circuit is made to successfully avoid the need of a post amplifier or any other cascading stages. The circuit can also operate at a wide range of power supply starting from 1.1 V with a clock frequency of 200MHz. Some trade off between precision and resolution are vividly discussed to get a better understanding of the circuit behavior. The simulated results are shown which are done in CADANCE gpdk-90 technology.
机译:本文提出了一种低功耗CMOS比较器,它能够很好地分辨大约0.2 mV的DC电压差。通过提供激励反馈,所提出的紧凑电路可以成功避免后置放大器或任何其他级联级的需要。该电路还可以在1.1 V起,时钟频率为200MHz的宽范围电源下工作。生动地讨论了精度和分辨率之间的一些折衷,以更好地了解电路性能。显示了用CADANCE gpdk-90技术完成的模拟结果。

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