A technique for robust division ratio switching in Multi Modulus Dividers with modulus extension

摘要

This paper presents a detailed study for the logic of Multi Modulus Dividers (MMDs) with modulus extension used in low power high speed frequency synthesizers. With modulus extension, there are two division ranges (the original division range and the extended one) with a boundary between them. In this work, we will show that this architecture needs some care when used in Sigma Delta (ΣΔ) Fractional-N synthesizers, especially when the ΣΔ drives the MMD to switch back and forth this boundary. This switching should be done successfully or else the PLL will completely lose lock.