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Critical Technical Issues in High Voltage SiC Power Devices

机译:高压SiC功率器件中的关键技术问题

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In this paper, we review the state of the art of SiC switches and the technical issues which remain. Specifically, we will review the progress and remaining challenges associated with SiC power MOSFETs and BJTs. The most difficult issue when fabricating MOSFETs has been an excessive variation in threshold voltage from batch to batch. This difficulty arises due to the fact that the threshold voltage is determined by the difference between two large numbers, namely, a large fixed oxide charge and a large negative charge in the interface traps. There may also be some significant charge captured in the bulk traps in SiC and SiO_2. The effect of recombination-induced stacking faults (SFs) on majority carrier mobility has been confirmed with 10 kV Merged PN Schottky (MPS) diodes and MOSFETs. The same SFs have been found to be responsible for degradation of BJTs.
机译:在本文中,我们审查了SIC交换机领域的艺术状态和仍然存在的技术问题。具体来说,我们将审查与SIC Power MOSFET和BJTS相关的进度和剩余挑战。在制造MOSFET时,最困难的问题是从批量到批次的阈值电压的过度变化。由于阈值电压由两个大数字之间的差异决定,即界面陷阱中的大的固定氧化物电荷和大负电荷来确定,因此难以产生。在SIC和SiO_2的散装陷阱中也可能存在一些显着的电荷。通过10kV合并的PN肖特基(MPS)二极管和MOSFET,确认了重组诱导的堆叠故障(SFS)对多数载流子迁移率的影响。已发现相同的SFS负责BJT的退化。

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