Three Dimensional Analysis of Turnoff Operation of SiC Buried Gate Static Induction Transistors (BG-SITs)

摘要

The tumoff mechanism of SiC buried gate static induction transistors (SiC-BGSITs) were analyzed by three dimensional device simulation. A current crowding occurs in the portion near the channel center away from the gate contact during the initial phase of the turnoff operation, which is resulted from a non-uniform potential distribution through the gate finger with the displacement current flowing there. This increases the turnoff delay time. The impact of source length on the turnoff performance was made clear.