A stacked SONOS technology, up to 4 levels and 6nm crystalline nanowires, with Gate-All-Around or independent gates (Φ-Flash), suitable for full 3D integration

摘要

We present the first experimental study of a Gate-All-Around (GAA) SONOS memory architecture with 4-level crystalline nanowire channels (down to 6 nm-diameter). The technology is also extended to an independent double gate memory architecture, called ¿-Flash. The experimental results with 6 nm nanowires show high programming windows (up to 7.4 V), making the structure compatible with multilevel operation. Excellent retention even after 10⁴ cycles is achieved. The independent double gate option has otherwise been successfully integrated with 4-level stacked nanowires for multibit applications. The ¿-Flash exhibits up to 1.8 V ¿V_Th between its two gates, demonstrating multibits operation. The basic process to fully disconnect the different nanowires in view of a full 3D integration of a memory array is discussed.