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Marching to the beat of Moore's Law

机译:前往摩尔定律的节拍

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摘要

Area density scaling in integrated circuits, defined as transistor count per unit area, has followed the famous observation-cum-prediction by Gordon Moore for many generations. Known as "Moore's Law" which predicts density doubling every 18-24 month, it has provided all important synchronizing guidance and reference for tools and materials suppliers, IC manufacturers and their customers as to what minimal requirements their products and services need to meet to satisfy technical and financial expectations in support of the infrastructure required for the development and manufacturing of corresponding technology generation nodes. Multiple lithography solutions are usually under considerations for any given node. In general, three broad classes of solutions are considered: evolutionary - technology that is extension of existing technology infrastructure at similar or slightly higher cost and risk to schedule; revolutionary - technology that discards significant parts of the existing infrastructure at similar cost, higher risk to schedule but promises higher capability as compared to the evolutionary approach; and last but not least, disruptive -approach that as a rule promises similar or better capabilities, much lower cost and wholly unpredictable risk to schedule and products yields. This paper examines various lithography approaches, their respective merits against criteria of respective infrastructure availability, affordability and risk to IC manufacturer's schedules and strategy involved in developing and selecting best solution in an attempt to sort out key factors that will impact the decision on the lithography choice for large-scale manufacturing for the future technology nodes.
机译:集成电路中的面积密度缩放,定义为每单位面积晶体管计数,遵循Gordon Moore的着名观察暨预测许多代。被称为“Moore的法律”预测每18-24个月的密度加倍,它为工具和材料供应商,IC制造商及其客户提供了所有重要的同步指导和参考,以及他们的产品和服务需要满足的最低要求支持相应技术生成节点的开发和制造所需的基础设施的技术和财务期望。对于任何给定节点,通常都会考虑多个光刻解决方案。一般而言,考虑了三种广泛的解决方案:进化技术,以相似或略高的成本和风险延长现有技术基础设施;革命性 - 以类似的成本丢弃现有基础设施的重要部分,计划的风险更高,但与进化方法相比,能力更高;最后但并非最不重要的是,破坏性 - 作为规则承诺的努力应对类似或更好的能力,更低的成本和计划和产品收益的风险。本文审查了各种光刻方法,各自的反对各自基础设施可用性的标准,可负担能力和IC制造商的日程和策略的标准,参与开发和选择最佳解决方案的计划,以便整理将影响对光刻选择决定的关键因素对于未来技术节点的大规模制造。

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