FPGA Implementation of Pulse Density Hopfield Neural Network

机译：脉冲密度Hopfield神经网络的FPGA实现

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In this paper, we present a FPGA Hopfield Neural Network system with learning capability using the simultaneous perturbation learning rule. In the neural network, outputs and internal values are represented by pulse train. That is, analog Hopfield Neural

机译：在本文中，我们使用同时扰动学习规则展示了一个具有学习能力的FPGA Hopfield神经网络系统。在神经网络中，输出和内部值由脉冲系表示。那是模拟Hopfield神经网络

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《Neural Networks, The 2007 IEEE International Joint Conference on》|2007年|P.700-704|共5页
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Maeda; Y.; Fukuda; Y.;
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中图分类工业技术;
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Hopfield neural nets; field programmable gate arrays; learning (artificial intelligence); perturbation techniques; FPGA implementation; field programmable gate array; perturbation learning rule; pulse density Hopfield neural network; pulse frequency representati;

机译：Hopfield神经网络;现场可编程门阵列;学习（人工智能）;摄动技术; FPGA实现;现场可编程门阵列;摄动学习规则;脉冲密度Hopfield神经网络;脉冲频率表示;

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专利

1. Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs [J] . Antonio Clemente Juan, Mansour Wassim, Ayoubi Rafic, Neurocomputing . 2016,第JANa1期

机译：FPGA上的容错Hopfield神经网络的硬件实现
2. FPGA implementation of a pulse density neural network with learning ability using simultaneous perturbation [J] . Maeda Y., Tada T. IEEE Transactions on Neural Networks . 2003,第3期

机译：具有同时扰动的学习能力的脉冲密度神经网络的FPGA实现
3. Dynamical analysis, sliding mode synchronization of a fractional-order memristor Hopfield neural network with parameter uncertainties and its non-fractional-order FPGA implementation [J] . Rajagopal Karthikeyan, Tuna Murat, Karthikeyan Anitha, The European physical journal: Special topics . 2019,第10期

机译：动态分析，具有参数不确定性的分数阶Memitristor Hopfield神经网络的滑模同步及其非分数级FPGA实现
4. FPGA Implementation of Pulse Density Hopfield Neural Network [C] . Maeda, Y., Fukuda, Neural Networks, The 2007 IEEE International Joint Conference on . 2007

机译：脉冲密度Hopfield神经网络的FPGA实现
5. Mathematical analysis of hopfield networks and neural networks implementation of steering controls for semilinear systems. [D] . Pandit, Purnima. 2007

机译：Hopfield网络和神经网络对半线性系统转向控制的数学分析。
6. Practical Guidelines for Approaching the Implementation of Neural Networks on FPGA for PAPR Reduction in Vehicular Networks [O] . Abdelhamid Louliej, Younes Jabrane, Víctor P. Gil Jiménez, 2019

机译：减少车辆网络中PAPR的FPGA上神经网络实现方法的实用指南
7. Hardware Implementation of a Fault-Tolerant Hopfield Neural Network on FPGAs [O] . Clemente Barreira Juan Antonio, Mansour Wassim, Ayoubi Rafic, 2016

机译：FPGA上的容错Hopfield神经网络的硬件实现

FPGA Implementation of Pulse Density Hopfield Neural Network

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