A 64-bit High-Speed Read-Write Look-Up Table Memory Implemented in GaAs HBT

机译：GaAs HBT中实现的64位高速读写查询表存储器

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This work describes a novel low-density bipolar memory circuit which functions near the maximum clock rate of the technology. An InGaP/GaAs HBT implementation of a 64-bit programmable look up table memory is demonstrated. By simulation, the read function

机译：这项工作描述了一种新颖的低密度双极存储电路，其在技术的最大时钟速率附近。演示了64位可编程查找表存储器的INGAP / GAAS HBT实现。通过模拟，读取功能

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《Bipolar/BiCMOS Circuits and Technology Meeting, 2006 IEEE》|2006年|P.1-4|共4页
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Metzger; A.G.; Asbeck; P.M.;
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中图分类工业技术;
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III-V semiconductors; bipolar memory circuits; digital storage; gallium arsenide; heterojunction bipolar transistors; indium compounds; table lookup; wide band gap semiconductors; 5 GHz; 64 bit; HBT; InGaP-GaAs; bipolar memory circuit; emitter coupled logic; flip-flop;

机译：III-V类半导体;双极存储电路;数字存储;砷化镓;异质结双极晶体管;铟化合物;查表;宽带隙半导体; 5 GHz; 64位; HBT; InGaP-GaAs;双极存储电路;发射极耦合逻辑;拖鞋;

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专利

1. High-speed 8:1 multiplexer and 1:8 demultiplexer implemented with AlGaAs/GaAs HBTs [J] . Nubling R.B., Yu J. IEEE Journal of Solid-State Circuits . 1991,第10期

机译：利用AlGaAs / GaAs HBT实现的高速8：1多路复用器和1：8多路分解器
2. High-speed noise-immune AlGaAs/GaAs HBT logic for static memory application [J] . Hagley W.A., Day D. IEEE Transactions on Electron Devices . 1991,第4期

机译：用于静态存储器应用的高速抗噪AlGaAs / GaAs HBT逻辑
3. 300 ps 4 K read-only memory implemented with AlGaAs/GaAs HBT technology [J] . Kwok C.Y., Sheng N.H. Electronics Letters . 1994,第10期

机译：采用AlGaAs / GaAs HBT技术实现的300 ps 4 K只读存储器
4. A 64-bit High-Speed Read-Write Look-Up Table Memory Implemented in GaAs HBT [C] . Metzger, A.G., Asbeck, Bipolar/BiCMOS Circuits and Technology Meeting, 2006 IEEE . 2006

机译：GaAs HBT中实现的64位高速读写查询表存储器
5. IMPLEMENTATION OF A DIGITAL OPTICAL MATRIX-VECTOR MULTIPLIER USING A HOLOGRAPHIC LOOK-UP TABLE AND RESIDUE ARITHMETIC [D] . HABIBY, SARRY FOUAD 1986

机译：用全息查找表和残差算术实现数字光学矩阵-矢量乘法器
6. Long-range and high-speed electronic spin-transport at a GaAs/AlGaAs semiconductor interface [O] . L. Nádvorník, P. Němec, T. Janda, -1

机译：GaAs / AlGaAs半导体接口处的远程高速电子自旋传输
7. Multi look-up table FPGA implementation of an adaptive digital predistorter for linearizing RF power amplifiers with memory effects [O] . Gilabert Pinal, Pere Lluís, Cesari Bohigas, Albert, Montoro López, Gabriel, 2008

机译：多查找表自适应数字预失真器的FpGa实现，用于线性化具有记忆效应的RF功率放大器
8. Implementation of a digital optical matrix-vector multiplier using a holographic look-up table and residue arithmetic [R] . Habiby, Sarry F. 1987

机译：使用全息查找表和残差算法实现数字光学矩阵矢量乘法器

A 64-bit High-Speed Read-Write Look-Up Table Memory Implemented in GaAs HBT

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