HAL; A Block Level Hardware Logic Simulator

摘要

A special purpose hardware machine, which simulates up to one half million gates and 2M byte RAM ICs at a 5 millisecond clock speed, is described. This is accomplished with a HArdware Logic (HAL) simulator. This performance is achieved with 32 distributed special parallel processors, which utilize Block Oriented Simulation Technique. The technique promises a good cost hardware logic simulator.