Electron transport through accumulation layers and its effect onthe series resistance of MOS transistors

摘要

A theoretical and experimental study of electron conductionthrough an electron-accumulated region is presented. The model developedto study carrier conduction through accumulation layers is validatedwith experimental results obtained from test structures fabricated intwo different 0.7 μm CMOS technologies. The results obtained here aregeneralized and extended to explain the gate-voltage dependence of theseries resistance of MOS transistors