integrated circuit yield; circuit optimisation; integrated circuit modelling; fault diagnosis; circuit simulation; logic design; logic simulation; yield optimization; clockless wave pipeline; CWP; inter-wave faults; intra-wave faults; clockless-induced data wave control; delay fault models; data wave request signals; fault rate modeling; slowest data bit propagation time; rising/falling bit transition time;
机译:嵌入式组合逻辑设计中无时钟波管道核心的可靠性建模与分析
机译:基于学习的无时钟电路永久性故障可靠性评估方法
机译:波浪特征的数值建模,增强埋藏断层钢管管道的性能
机译:用帧内/间隙故障产生无时钟波管道的优化
机译:在地震波传播下采用受控低强度材料(CLSM)回填的钢水管的性能和反向滑倒故障破裂
机译:咖啡阿拉伯半乳聚糖和半乳甘露聚糖混合物的产量糖分和糖苷键分析数据以及从废咖啡渣中微波辅助提取的优化
机译:基于学习的可靠性评估方法,用于检测无机电路永久性故障
机译:利用slater波函数对Li(2s产率2p),Li(2s产率3p),Na(3s产率4p),mG(3p产率4s),Ca(4s产率)的Born近似计算总电子激发截面4p)和K(4s产率4p)激发