A simulation analysis of quarter-micron CMOS LSI input circuit behavior under CDM-ESD for protoection device improvement

摘要

The behavior of a quarter-micron CMOS LSI input circuit during charged device model (CDM) ESD has been investigated using a device simulator. The result clarifies the relation between the protection device structure and the voltage difference that appears in the inner circuit and causes gate oxide breakdown. The result indicates that the most efficient protection device structure is an optimized lateral silicon-controlled rectifier (SCR). An improved structure that effectively prevents voltage increases in the internal circuits during CDM-ESD has been proposed for future CMOS LSI protection devices.