The economies of flip chip wafer bumping and assembly

摘要

As the number of pads on IC's increase with accompanying requirements for higher performance and high density packaging, the use of flip chip attach becomes a compelling technology for a variety of potential users. Among the more important variables influencing the decision to adopt flip chip attach are the associated costs and processes which represent the most significant investment in time. This paper discusses and demonstrates the basic costs associated with wafer bumping, flip chip attach processes and capital investment, and also includes a comparison to traditional wire bonding.