Investigation of lithography yield-loss issues from focusing/leveling system of advance ste

摘要

Abstract: Three types of dies on the wafer including dies on wafer edge, dies adjacent to testkey patterns, and dies with asymmetric chip layout have been identified for mistilting on the lithography exposure processes. There are several approaches i.e. dummy die exposed on the wafer edge, various focus offset, and pattern layout modification etc. can alleviate this problem. However, to complete solve these issues rely on the fundamental and methodical improvements on the stepper leveling system and control software.!2