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Modeling of power/ground plane noise in high speed digital electronics packaging

机译:高速数字电子封装中的电源/接地平面噪声建模

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摘要

A new model for the simulation of power/ground plane noise which is simple in principle, accurate in its solutions, and applicable to various levels of high-speed digital electronics packaging, is given. It is found that one can obtain accurate modeling of delta-I noise in power and ground planes without resorting to full-wave electromagnetic modeling. Sample results of the simulated delta-I noise with the method are shown.
机译:给出了一种用于模拟电源/地平面噪声的新模型,该模型原理上简单,解决方案准确,并且适​​用于各种级别的高速数字电子封装。已经发现,无需求助于全波电磁建模,就可以在电源和接地层中获得δ-I噪声的精确建模。显示了用该方法模拟的delta-I噪声的样本结果。

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