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Ceramic varistor fabricated by surface diffusion

机译:通过表面扩散制造的陶瓷压敏电阻

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A novel ceramic varistor was fabricated by the surface diffusion of grain boundary materials into the semiconductive ceramic substrate. (Ba/sub 0.8/Sr/sub 0.2/)(Ti/sub 0.9/Zr/sub 0.1/)O/sub 3/ (BSTZ) doped with 0.2 mol.% Nb/sub 2/O/sub 5/ was adopted as the ceramic substrate. The powder blends of LiCO/sub 2/ and Bi/sub 2/O/sub 3/, with molar ratios of Li/sub 2/CO/sub 3//Bi/sub 2/O/sub 3/ (Li/Bi)=1/1 and 11/89 were adopted as the grain boundary material for surface diffusion. Better varistor characteristics were obtained by diffusing Li/Bi=11/89 into the BSTZ substrate. By surface diffusing Li/Bi=1/1 into 0.2 mol.% Nb/sub 2/O/sub 5/-doped BSTZ substrate at 1080 degrees C for 2 h, a varistor with a varistor constant of 6 and V/sub B/=28 V was fabricated. While diffusing Li/Bi=11/89 at 1100 degrees C into the same substrate, the varistor voltage was also 28 V with a higher varistor constant of 14. The average breakdown voltage per grain boundary of Li/Bi=11/89 diffused BSTZ was about 0.4 V/grain boundary, which is much smaller than that of ZnO ceramic varistor. A model similar to the n-C-i-C-n model is adopted to explain the results obtained.
机译:通过晶界材料在半导体陶瓷基体中的表面扩散,制造出一种新型的陶瓷压敏电阻。 (Ba / sub 0.8 / Sr / sub 0.2 /)(Ti / sub 0.9 / Zr / sub 0.1 /)O / sub 3 /(BSTZ)掺杂有0.2 mol%Nb / sub 2 / O / sub 5 /作为陶瓷基板。 LiCO / sub 2 /和Bi / sub 2 / O / sub 3 /的粉末混合物,摩尔比为Li / sub 2 / CO / sub 3 // Bi / sub 2 / O / sub 3 /(Li / Bi )= 1/1和11/89被用作用于表面扩散的晶界材料。通过将Li / Bi = 11/89扩散到BSTZ基板中可获得更好的压敏电阻特性。通过在1080摄氏度下将Li / Bi = 1/1表面扩散到0.2 mol%的Nb / sub 2 / O / sub 5 /掺杂的BSTZ衬底中2 h,得到压敏电阻常数为6和V / sub B的压敏电阻制作了28V。当在1100摄氏度下将Li / Bi = 11/89扩散到同一衬底中时,压敏电阻电压也为28 V,压敏电阻常数更高,为14。Li / Bi = 11/89的每个晶界平均击穿电压均扩散了BSTZ晶界约为0.4 V /晶界,比ZnO陶瓷压敏电阻要小得多。采用类似于n-C-i-C-n模型的模型来解释获得的结果。

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