Emerging resistive non-volatile memory technology (RRAM) is fast gaining importance as a possible successor of Flash memory. Very few experimental studies exist on emerging RRAM that analyze the impact of soft-techniques or purely algorithm driven performance enhancement for such memory devices. In this paper, we study in detail four different soft techniques optimized for bit-flip minimization, mainly in the context of resistive filamentary type RRAM. In particular, we study the impact of Data Compare Write (DCW), Flip-N-Write (FNW), Coset Coding (CC), and Cost Aware Flip Optimization (CAFO) algorithms. As a case study for experimental validation, we implement the algorithms on a commercial 256 Kb CBRAM chip. Detailed comparative analysis of the soft-techniques is presented for different parameters such as write-latency, endurance, error count, computational latency, and memory overhead.
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