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Leveraging CPU Electromagnetic Emanations for Voltage Noise Characterization

机译:利用CPU电磁辐射进行电压噪声表征

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Worst-case dI/dt voltage noise is typically characterized post-silicon using direct voltage measurements through either on-package measurement points or on-chip dedicated circuitry. These approaches consume expensive pad resources or suffer from design-time and run-time overheads. This work proposes an alternative non-intrusive, zero-overhead approach for post-silicon dI/dt voltage noise generation based on sensing CPU electromagnetic emanations using an antenna and a spectrum analyzer. The approach is based on the observation that high amplitude electromagnetic emanations are correlated with high voltage noise. We leverage this observation to automatically generate voltage noise (dI/dt) stress tests with a genetic-algorithm that is driven by electromagnetic signal amplitude and to obtain the first-order resonance-frequency of the Power-Delivery LC-tank network. The generality of the approach is established by successfully applying it to three different CPUs: two ARM multi-core mobile CPU clusters hosted on a big.LITTLE configuration and an ×86-64 AMD desktop CPU. The efficacy of the proposed methodology is validated through VMIN and direct voltage noise measurements.
机译:通常在硅片后使用最差情况的dI / dt电压噪声来表征,这些噪声是通过封装上测量点或片上专用电路通过直接电压测量来表征的。这些方法消耗了昂贵的填充资源或遭受了设计时和运行时的开销。这项工作提出了一种替代的非侵入式,零开销的方法,用于基于硅天线后的dI / dt电压噪声的产生,该方法使用天线和频谱分析仪来检测CPU的电磁辐射。该方法基于以下观察:高振幅电磁辐射与高压噪声相关。我们利用这一观察结果,利用遗传算法自动生成电压噪声(dI / dt)压力测试,该遗传算法由电磁信号幅度驱动,并获得电力输送LC储罐网络的一阶共振频率。该方法的通用性是通过将其成功应用于三个不同的CPU上建立的:两个以big.LITTLE配置托管的ARM多核移动CPU群集和一个×86-64 AMD台式机CPU。通过VMIN和直流电压噪声测量验证了所提出方法的有效性。

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