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Gas cluster ion beam processing for improved self aligned contact yield at 7 nm node FinFET: MJ: MOL and junction interfaces

机译:气体团簇离子束处理可提高在7 nm节点处的自对准接触良率FinFET:MJ:MOL和结界面

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Self-aligned contact (SAC) is required for 7 nm node to reduce susceptibility of contact-to-gate short failures. This requires forming a SAC cap on metal-recessed gate. The SAC cap formation is usually achieved by removing nitride on the field by planarization techniques such CMP (chemical mechanical polishing) or GCIB (gas cluster ion beam) processes. Significant gate stack height variation can be observed lot-to-lot and wafer-to-wafer due to accumulated variations from multiple steps, including several CMP steps, before the SAC cap module, especially during early research and development prior to full optimization of the steps before the SAC cap module. GCIB potentially offers a method by which the early development stage variation due to CMP steps can be reduced, allowing integration and device learning during the early stages of a program. This study shows a comparison of SAC cap formation by CMP only vs. GCIB with integrated metrology enabled location specific processing. By using GCIB with feed-forward scatterometry measurements taken from a 2D measurement pad we have been able to significantly improve both lot-to-lot and wafer-to-wafer variation on early development wafers. This has led to improvement in within wafer SAC cap thickness non-uniformity, wafer to wafer and lot to lot device yield for gate-contact over a CMP-only process flow.
机译:7 nm节点需要自对准触点(SAC),以降低触点到栅极短路故障的敏感性。这就需要在金属凹入式浇口上形成一个SAC盖。 SAC帽的形成通常是通过采用CMP(化学机械抛光)或GCIB(气体团簇离子束)工艺等平面化技术在现场去除氮化物来实现的。由于SAC盖模块之前多个步骤(包括多个CMP步骤)的累积变化,尤其是在全面优化前的早期研究和开发过程中,由于批次和晶圆之间的累积变化,可以在批次之间观察到明显的栅极堆叠高度变化。在SAC盖子模块之前的步骤。 GCIB潜在地提供了一种方法,通过该方法可以减少由于CMP步骤导致的早期开发阶段变化,从而允许在程序的早期阶段进行集成和设备学习。这项研究显示了仅通过CMP进行的SAC帽形成与采用集成计量技术的特定位置处理的GCIB进行的比较。通过将GCIB与从2D测量垫获得的前馈散射测量结合使用,我们已经能够显着改善早期开发晶圆上的批次间和晶圆间差异。这导致了在仅采用CMP的工艺流程中进行栅极接触时,晶片SAC盖厚度不均匀性,晶片与晶片之间以及批次与批次之间的器件良率得到改善。

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