Clock Gating Implementation on commercial Field Programmable Gate Array (FPGA)

摘要

This paper discusses the application and implementation of clock gating technique to RISC32 (a customizable processor on Field Programmable Gate Array (FPGA)) for reduction of dynamic power consumption on clock tree. The FPGA used is Artix-7 (xc7a100tcsg324-1) from Xilinx with 28nm technology. The power consumption of clock tree is reduced by 24% after implementing the proposed clock gating technique.