Design and Implementation of DDR4 SDRAM Controller Based on FPGA

摘要

T139 DDR4 SDRAM is the latest Double-Data-Rate Fourth Generation Synchronous Dynamic Random Access Memory with the advantages of large capacity, high speed, low power consumption and good stability. In order to solve the data cache problem of the ultra-high-speed sampling and processing system, this paper designs DDR4 SDRAM read-write controller module based on UltraScale DDR4_v2.2 IP core. This paper mainly introduces the characteristics and working principle of DDR4, introduces the DDR4 read-write controller module in detail, and packages it as the FIFO interface and finally tests and gives the test results. System tests results verify that the module meets the requirements of large-capacity data cache, and has the advantages of good stability and high portability.