This paper reports on the yield optimization of a wafer-level indium (In)-based bonding process for joining 4-inch sapphire and silicon (Si) wafers. The process allows to realize neural probes with integrated micro light-emitting diodes (μLED) for optogenetic applications. The sapphire substrates comprise 6-μm-thick gallium nitride (GaN)-based μLEDs with lateral dimensions down to 50×50 μm2, which are transferred by the In-based bonding process onto gold pads on a Si wafer with interconnecting leads. Challenges that needed to be addressed in this context were the patterning of In on top of the GaN structures and thermomechanical stress limiting the overall bonding yield. The first challenge was met using a bilayer lift-off process; the yield was optimized by using an analytical model supported by an experimental study systematically varying the bond metal thickness tIn and the normalized bond area Anorm = Apads/Awafer, where Apads and Awafer denote the total area of all bond pads on the wafer and the wafer area, respectively. The stress-induced rupture of bond interfaces is completely suppressed when tin ≥ 3 μm and Anorm ≥ 15%. The optimized In-based bonding process was successfully applied to realize 2D μLED arrays with high yield.
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