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Amorphous silicon thin-film transistor gate driver circuit design optimization using a simulation-based evolutionary technique

机译:非晶硅薄膜晶体管栅极驱动电路设计优化使用基于仿真的进化技术

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In this work, we for the first time optimize dynamic characteristic of amorphous silicon thin-film transistor (TFT) gate (ASG) driver circuits for TFT-LCD panel. The rise time, fall time, power dissipation, and ripple voltage of the ASG driver circuit are optimized using simulation-based evolutionary method which integrates genetic algorithm and circuit simulation on the unified optimization framework [1]. Two different a-Si:H TFT ASG driver circuits are optimized, the first circuit consisting of 14 a-Si:H TFT devices is designed for the specification of the rise time < 1.5 µs, the fall time < 1.5 µs and the ripple voltage < 3 V with the minimization of total layout area. The second one with 8 a-Si:H TFTs is further optimized with the power dissipation < 2 mW. The results of this study successfully met the desired specification; consequently, it benefits manufacturing of TFT-LCD panel.
机译:在这项工作中,我们首次优化用于TFT-LCD面板的非晶硅薄膜晶体管(TFT)栅极(ASG)驱动电路的动态特性。 ASG驱动电路的上升时间,下降时间,功耗和纹波电压通过基于仿真的进化方法进行了优化,该方法集成了统一优化框架上的遗传算法和电路仿真[1]。两种不同的A-Si:H TFT ASG驱动电路经过优化,第一电路由14 A-Si:H TFT器件组成,设计用于上升时间<1.5μs,下降时间<1.5μs和纹波电压。 <3 V,最小化总布局区域。具有8A-Si:H TFT的第二个,通过功率耗散<2mW进一步优化。本研究的结果成功达到了所需的规格;因此,它有利于TFT-LCD面板的制造。

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