首页> 外文会议>IEEE International Conference on Semiconductor Electronics >Amorphous silicon thin-film transistor gate driver circuit design optimization using a simulation-based evolutionary technique
【24h】

Amorphous silicon thin-film transistor gate driver circuit design optimization using a simulation-based evolutionary technique

机译:使用基于仿真的进化技术优化非晶硅薄膜晶体管栅极驱动器电路设计

获取原文

摘要

In this work, we for the first time optimize dynamic characteristic of amorphous silicon thin-film transistor (TFT) gate (ASG) driver circuits for TFT-LCD panel. The rise time, fall time, power dissipation, and ripple voltage of the ASG driver circuit are optimized using simulation-based evolutionary method which integrates genetic algorithm and circuit simulation on the unified optimization framework [1]. Two different a-Si:H TFT ASG driver circuits are optimized, the first circuit consisting of 14 a-Si:H TFT devices is designed for the specification of the rise time < 1.5 µs, the fall time < 1.5 µs and the ripple voltage < 3 V with the minimization of total layout area. The second one with 8 a-Si:H TFTs is further optimized with the power dissipation < 2 mW. The results of this study successfully met the desired specification; consequently, it benefits manufacturing of TFT-LCD panel.
机译:在这项工作中,我们首次优化了TFT-LCD面板的非晶硅薄膜晶体管(TFT)栅极(ASG)驱动器电路的动态特性。 ASG驱动器电路的上升时间,下降时间,功耗和纹波电压使用基于仿真的进化方法进行了优化,该方法将遗传算法和电路仿真集成在统一的优化框架上[1]。优化了两个不同的a-Si:H TFT ASG驱动器电路,第一个电路由14个a-Si:H TFT器件组成,其设计用于规范上升时间<1.5 µs,下降时间<1.5 µs和纹波电压<3 V,总布局面积最小。具有8个a-Si:H TFT的第二个器件进一步优化,功耗<2 mW。这项研究的结果成功地达到了预期的规格。因此,它有利于TFT-LCD面板的制造。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号