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Multi-response optimization in vertical double gate PMOS device using Taguchi method and grey relational analysis

机译:基于Taguchi方法和灰色关联分析的垂直双栅PMOS器件多响应优化

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Miniturization of MOSFET device leads to statistical variation of many process parameters that may cause the degradation of the device performance. Taguchi method has been applied as a tool to optimize the process parameter variation. Since, Taguchi method is only limited to the solution of a single response, it is combined with grey relational analysis (GRA) to solve multi-response optimization. This paper presents a proposed method to optimize halo implant energy, halo implant tilt angle, source/drain (S/D) implant energy and source/drain (S/D) implant tilt angle upon multiple performance characteristics of WSix/TiO2 channel vertical double-gate PMOS device. The normalized experimental results based on L9 Taguchi method are utilized to compute grey relational coefficients and grades. The final results show that the process parameters have been successfully optimized in obtaining a nominal threshold voltage (-0.1783 V), a high drive current (1539.1 μA/μm) and a low leakage current (6.749E-11 A/μm) which meet the International Technology Roadmap Semiconductor (ITRS) 2013 prediction for high performance logic multi-gate technology.
机译:MOSFET器件的小型化导致许多工艺参数的统计变化,这可能会导致器件性能下降。田口方法已被用作优化工艺参数变化的工具。由于Taguchi方法仅限于单个响应的解决方案,因此将其与灰色关联分析(GRA)结合以解决多响应优化问题。本文提出了一种建议的方法,可根据WSix / TiO2通道垂直双通道的多种性能特征来优化晕环注入能量,晕环注入倾斜角,源/漏(S / D)注入能量和源/漏(S / D)注入倾斜角。门PMOS器件。利用基于L9 Taguchi方法的归一化实验结果来计算灰色关联系数和等级。最终结果表明,已经成功优化了工艺参数,以获得符合要求的标称阈值电压(-0.1783 V),高驱动电流(1539.1μA/μm)和低泄漏电流(6.749E-11 A /μm)。国际技术路线图半导体(ITRS)2013年对高性能逻辑多门技术的预测。

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