Accelerating Electromigration Wear-Out Effects Based on Configurable Sink-Structured Wires

摘要

In this work, we propose a novel electromigration (EM) wear-out acceleration technique for fast EM reliability-testing and aging-analysis of practical VLSI chips. The new acceleration technique is based on the observation that sink structures have a significant impact on the lifetime of multisegment interconnect wires. We develop a new configurable sink-structured interconnect wire in which the current in the sink segment can be activated/deactivated dynamically during operation. Using this method, we show how an interconnect structure, which is initially immortal to EM effects, can be induced to fail very quickly. Furthermore, we use a robust failure scheme which considers both early and late failures depending on the wire topology and current direction. The most significant contribution of the proposed work is that it enables EM accelerated testing at low temperature and voltage. This feature enables the testing of EM wear-out in isolation without invoking other reliability effects which are also accelerated by the traditional stressing conditions. Using the proposed method, we can achieve a lifetime reduction from 10+ years to a few days, or even hours, at relatively low temperatures, which is very desirable for practical EM testing of typical nanometer CMOS ICs.