The design of low noise chopper operational amplifier with inverter

摘要

The input offset voltage is a quit important performance parameter for operational amplifiers, and the low frequency 1/f noise has a great effect on the offset voltage. In this paper, chopping technology which is an efficient approach to decrease the 1/f noise and offset voltage of CMOS amplifiers is adopted. In the low pass filter, the multiplier composed of R and C is used to filter out the modulation noise. The circuit of the presented chopper amplifier is designed and simulated with 45nm CMOS process and a 1V supply. Simulated results show that the total harmonic distortion of chopper amplifier is 54.1dB and the chopper frequency is 10 kHz. The input referred noise is 2.54 nV / √Hz @1kHz, and the average power consumption is 65.5μW. The proposed technology has a pleasurable preference.