RLC circuits; VLSI; crosstalk; failure analysis; integrated circuit interconnections; integrated circuit noise; HSPICE; L model; RLC global interconnects; circuit integrity; crosstalk noise estimation; crosstalk noise voltage; deep submicron VLSI circuit; failure modes; signal integrity; Capacitors; Couplings; Estimation; Noise; SPICE; RLC interconnect; VLSI circuit; crosstalk; deep submicron; signal integrity;
机译:VLSI电路耦合RLC互连中电流模式信令的串扰噪声分析模型
机译:高速VLSI电路的铜互连中串扰噪声的分析和最小化
机译:高速VLSI电路铜互连串扰噪声的分析与最小化
机译:深度亚微米VLSI电路RLC互连串扰噪声的估算
机译:深亚微米电路中设计指标的准确估算:RLC互连延迟和串扰感应功率。
机译:基于异步复杂直方图的联合光纤非线性噪声估计OSNR估计和调制格式识别和数字相干接收器的深度学习
机译:基于VLsI的电路中屏蔽互连的串扰噪声模型