CMOS integrated circuits; MOSFET; comparators (circuits); feedback; flip-flops; invertors; preamplifiers; CMOS process model; PMOS transistors; active bias circuit; back-to-back inverters; frequency 1 GHz; high-speed low-kickback-noise accurate comparators; latch structure; positive feedback structure; preamplifier-latch topology; process variations; rail-to-rail folded cascode amplifier; size 0.35 mum; voltage 2 mV; Capacitors; Inverters; Latches; MOS devices; Noise; Power demand; Threshold voltage; High Resolution Comparator; High Speed ADC; High Speed Comparator; Kickback Noise;
机译:用于高速折叠和插值ADC的低踢噪声和低压锁定比较器
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机译:高速精确CMOS比较器
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机译:重叠的软比较器,用于高速和准确的ADC
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机译:一种基于高速树的64位CmOs二进制比较器