Controlling and signal processing core for wireless implantable telemetry system

摘要

We present our initial design implementation of a controlling and processing core circuit that is part of our RF implantable system for monitoring physiological parameters of small laboratory animals. The circuit is prototyped and experimentally verified using an FPGA development platform, then synthesized and simulated in 130nm CMOS IC technology using standard digital cells. Thus, the overall core design occupies 1.6mm × 1.6mm CMOS area, and consumes 14.5mW (IC) or 163mW (FPGA) total power.